Consider the address bus demultiplexing and latching circuitry for an x88 CPU. Discuss if (positive or negative) edge triggered flip-flops (versus level triggered latches like 74C373) can be used to demultiplex and latch the address signals supplied by the CPU. If your answer is yes, draw the schematics for realization of address bus demultiplexing and latching with the (positive or negative) edge triggered FFs. Discuss any timing issues related to setup and hold time requirements. You must pick a specific 74xx series device (for the edge-triggered FF) to include in your schematics.

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