Cache Specifications:

The cache size (to store data or instructions) is 256 bytes.

The block size is 32 bytes.

The cache is initially empty.

The Least Recently Used (LRU) replacement policy is used.

The following is a list of 16-bit memory addresses issued by the processor. Assume that the memory is byte-addressable.

0x0004, 0x000C, 0x0014, 0x0048, 0x0044,0x0105, 0x0050, 0x0018, 0x0210, 0x0020, 0x0024, 0x0106, 0x001C

(a) How many blocks are in the fully-associative cache?
(b) How many bits are needed for the tag and block-offset fields of the 16-bit address? (c) Determine the tag and block-offset for each address.
(d) Identify each address as either a cache hit or a cache miss.
(e) Show the final contents of the fully-associative cache.
(f) Calculate the total size (in bits) of the fully-associative cache.

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